For Atomicity, we use sequential consistency without much detail without talking about other options. Here, we talk about instruction reordering by the CPU and the compiler.
The compiler can change the order of certain events to make things faster. The hardware can do something similar as well. We also need to make sure that the value we’re reading is the latest one (since threads could update at any given time).
- For lines like unlocking Mutexes, we need to make sure this is not reordered (since there is no clear dependency). Our expectations for concurrency is sequential consistency.
- Basically, if there is a clear dependancy of variables, the compiler won’t try to reorder, but releasing a lock has no explicit dependancy. Compilers and processors may reorder non-interfering memory operations:
- These are independent so they can be executed in any order.
For each thread
- In order execution
- Interleave the threads’ execution
Causality
- We can use semaphores to make sure one thing happens before another
- We use something like a Barrier, but it is a memory barrier or Memory Fence.
- Acquire-Release
- We typically want to use sequential consistency because atomics are hard.